We are delighted to announce that the first issue of Cheryl Watson’s Tuning Letter since its transition to Planet Mainframe has just been published. You can find the 117-page Tuning Letter 2024 No. 3 on the new home of the Tuning Letter, https://tuningletter.planetmainframe.com/. You can find the full Table of Contents here.
This issue contains the following:
- An updated FAQ to address any questions our subscribers might have regarding how the transition will impact them. Regular readers will recall that we had a FAQ in Cheryl Watson’s Tuning Letter 2024 – Vol 1. Since then, we have completed the transition to Planet Mainframe, and we have also received additional questions from our subscribers. Tuning Letter Transition FAQ has been updated with include new information. We hope the latest FAQ answers all your questions, but if you have any others, please email us at admin@planetmainframe.com . We love hearing from our readers and will be delighted to answer your questions.
- The biggest mainframe news over the last quarter has probably been IBM’s announcement of the Telum II chip and the new Spyre AI Accelerator at the 2024 Hot Chips conference. The Telum II chip will be at the heart of the zNext generation of mainframes, expected in the first half of 2025. Even though much of the attention has been on the dramatic increase in AI processing capacity, the Telum II delivers advances in many areas:
- The amount of physical level 2 cache on each Telum II chip has increased from 256MB to 360MB – this is very important if you want to achieve the maximum performance from your zNext.
- The functions that used to be performed in the ASIC chip on each FICON Express adapter has been moved to a new Data Processing Unit (DPU) on the Telum II chip, delivering power savings, improved performance, and the ability to have more ports per FICON Express adapter.
- The clock speed has been increased from 5.2 GHz on a z16 to 5.5 GHz on a Telum II. Additionally, the Telum II is based on 5nm technology, compared to the 7nm ships used in the z16.
- The on-chip AI Accelerator delivers four times the performance of the z16 equivalent. And up to 32 PCIe-attached Spyre accelerators can be ordered in a zNext, delivering a staggering total of 9,600,000,000,000 operations per second.
These are just some of the enhancements in the Telum II chip. For our full review of the Telum II, see our 17-page in-depth Analysis of IBM Telum II Announcement.
- As part of the transition of Cheryl Watson’s Tuning Letter to Planet Mainframe, the material from the previous, subscriber-only, Watson & Walker Publications site has been moved to the Tuning Letter’s new home, https://tuningletter.planetmainframe.com/. We took the opportunity to also move the information that was previously available to the public, on https://watsonwalker.com/, to the Planet Mainframe website. So, now we have an enriched source of information (all the Watson & Walker material plus all the Planet Mainframe material) all available on the same site. To help subscribers quickly navigate the new site, we created a short Guide to Navigating the New Publications Website; we hope you will find it helpful.
- We are sure that all our readers know our friend Todd Havekost. Todd has been providing insightful articles focused on extracting the maximum value from your SMF data for over five years. With an eye to the shrinking population of very experienced performance analysts and the growing number of readers that are new to the z/OS performance management discipline, Todd kindly provided yet another masterpiece for this Tuning Letter issue. Performance Management 101 – Transaction Processing Workloads draws on Todd’s vast experience as a performance analyst, and also as a consultant and advisor to IntelliMagic’s many clients. Using real-world examples, Todd shows how his thoughtful, methodical approach to performance issues results in quicker problem resolution and less time chasing ‘red herrings.’ This article should be considered required reading for anyone with a performance analysis role.
- Next up, we have our ever-popular User Experiences and Tips, with three practical topics:
- 1. The first one is a reminder of the importance of keeping an eye on the level of ‘SIIS’ activity on your systems. This was a hot topic a few years back, but was moved off people’s to-do lists by more urgent day-to-day firefighting. But just because it slipped off your radar doesn’t necessarily mean the problem has gone away. Our first user experience illustrates a reasonable approach to displaying and investigating the level of SIIS activity on your system.
- 2. The next user experience is related to checking and possibly correcting the volatility state of your Coupling Facility. Some products behave differently depending on whether the CF containing that product’s structures is volatile or now. If you use an external battery (UPS) to protect your CF from power failures, or possibly even if your CF CPC has the Internal Battery Feature, it is possible the CF’s actual volatility is not reflected in the CFs opinion about its volatility. If you find that to be the case, make sure to check out this user experience before making any changes.
- The last item is a Tip. We know many z/OS experts who plan to retire during the next 12 months. They still love the technical aspects of their job, but they also have other aspects of their lives that deserve more attention. If you, or a friend, fall into that category, you should be aware of the SHARE Emeritus program. It offers no-cost membership, meaning you can continue to access presentations from SHARE sessions, you can participate in SHARE webinars, and avail of most of the other benefits of corporate or individual membership. Emeritus members also get a deeply discounted registration fee if you want to attend a SHARE conference. For more information, make sure to check it out on the SHARE website.
- Next up, we have an article to help you more accurately configure your CF CPCs. There have been many enhancements to CF scalability since the z14, the short-range ICA-SR links have performance improvements in z16, and there may be overhead considerations for CFs in a multi-drawer z16. For much more information on all this, and about CF performance and capacity planning in general, read Coupling Facility Configuration Considerations.
- And to round things off, the News section provides a meaty list of recent New Function APARs for z/OS, CICS, Db2, and MQ, plus info about updated CPS tools from IBM, and information about upcoming user conferences.
If you are not a current Tuning Letter subscriber, what are you waiting for? See our website for information about subscriptions.
We hope you find Tuning Letter 2024 No. 3 educational and entertaining. Remember that we love hearing from our readers, so feel free to contact us any time, and share specific topics you would like to see in a future Tuning Letter article. Take care, and bye for now.
The Planet Mainframe Cheryl Watson’s Tuning Letter team