In this issue, I’ll cover the following:
1. Our Last Class! May 17, 1999
2. Latest Amdahl Announcements
3. Latest IBM CMOS Processors
4. Cheryl Watson’s TUNING Letter, 1998, No. 3 Summary (previously
printed in issue 1998, No. 3, page 3)
5. Informational APARs of Interest
6. SHARE in Washington, DC in August
1. Our Last Class! May 17, 1999
In the last Cheryl’s List we announced that I would not be teaching any more classes after the 1998 series concludes (with perhaps one additional overflow class). Our last Advanced OS/390 Performance & Capacity Planning Class (October 19-23) was full before our TUNING Letter subscribers even saw the notice. Therefore, we plan to present a final “overflow” Advanced class in Sarasota, Florida on May 17-21, 1999. We are just now finalizing the hotel arrangements. Please note that we do not plan to limit attendance at this last class. If the class is over 40 people, I may not have time to look at everyone’s individual reports or answer all the questions during class week. I will attempt to handle these after the class has ended.
2. Latest Amdahl Announcements
On June 23rd Amdahl announced an updated technology road map. You can find a full set of announcements on their home page, http://www.amdahl.com.
The road map includes plans for their upcoming 800 Series, which will be available in 1Q99 and “will approach 1000 MIPS capacity.” With IBM’s announcement yesterday (see below), we expect Amdahl to revise these estimates and push their developers for a larger capacity model before GA. The Amdahl announcements also include a statement of direction to support the newest technology (such as FICON channels and GeoPlex support), a description of their Multiple Server Feature (can reduce software costs significantly when consolidating workloads), implementation services and enhancements for Parallel Sysplex, Millennium Disaster Recovery Program, and Millennium Xtra Capacity Option (additional CPUs to eliminate down time for capacity upgrades). I was especially interested in Amdahl’s Software Value Assessment (SVA) Service that helps installations reduce their software license fees.
Amdahl reports very good acceptance of their 700 series with over 40,000 MIPS shipped in 2Q98 (which exceeded their MIPS shipments for the previous four quarters). According to Amdahl, they feel this now places them in second place above HDS in total MIPS shipped.
3. Latest IBM CMOS Processors
In a previous Cheryl’s List and TUNING Letter issue, we described IBM’s May 7th announcement of their new G5 series of processors, the 9672-Rx6 series (announcement #198-115). Yesterday (July 28th), they announced (#198-177) additional processors and a boost in capacity. The primary line is based on a 125 MIPS uni-processor, but IBM was able to provide a 10-15% improvement on their initial capacity estimates since May 7th. The turbo model 10-way is now rated at 1040 MIPS, the first S/390 machine to break the 1 BIPS barrier. IBM claims that the turbo uni at 150 MIPS is faster than the Skyline xx7 uni that HDS claims is 150 MIPS.
Listed below are the updated Processor group, MSUs, and version codes. An asterisk indicates new models. TUNING Letter subscribers may send an email to admin@watsonwalker.com with their company name and address in order to receive an email with estimated MIPS.
The T16 and T26 are RPQ models (by special request).
HDS had previously announced turbo models in the 8-way and 9-way (like IBM’s Y86 & Y96). HDS is also expected to announce performance data prior to their GA, matching IBM’s G5 performance and capacity, model for model.
4. Cheryl Watson’s TUNING Letter, 1998, No. 3 Summary
The 1998, No. 3 TUNING Letter issue was mailed to subscribers on July 15, 1998. The management Issues section is included here to give you a sense of the scope and contents of the issue. The TUNING Letter is a print-only product published six times a year, with an average of forty pages per issue. See our Web page for details!
FOCUS ON CAPACITY PLANNING
This issue focuses on capacity planning. The ability to accurately predict the resource requirements for upcoming workloads is a critical step in providing consistent, productive service to your users. Although the articles are from different authors, we feel that the four articles provide complementary techniques and advice. The first article, although somewhat technical, is from Greg Dyck, a senior analyst at IBM, and provides a well-documented understanding of MVS capture ratio and reasons for uncaptured time. The second article provides a short but illuminating overview of how one site does their capacity planning using peak hour processing. Our third article is provided by Ray Wicks, a well-known capacity planner, who describes a checklist for capacity planners. Lin Merritt, from Trigon Blue Shield, describes how to create three types of profiles that can be used for capacity planning.
Our Last Classes
Cheryl is cutting back on her work schedule. While the TUNING Letter will remain, the three classes still left in 1998 are planned to be the last. Sign up early since we will be limiting the class sizes. Note: We have since added one more overflow class (see item #1).
Parallel Sysplex & Continuous Availability
Last year, Amdahl interviewed Cheryl about parallel sysplex and the need for continuous availability for an article in their newsletter, “The Word on Parallel Sysplex”. This is a management overview of the requirement for continuous availability and the solution provided by parallel sysplex. If you are faced with reducing the system down-time for your users, this article may help you find a solution.
COBOL Issues
Many sites that have migrated their COBOL programs to use Language Environment (LE) have seen some remarkably high CPU increases (up to 30%, but averaging 10%). Because of the need to recover some of that CPU overhead, many people are looking for easy ways to reduce runtimes. We have included some suggestions for you. Also, if you are having trouble converting all of your COBOL programs to be Y2K compatible, you might be interested in a new product from IBM called COBOL Millennium Language Extensions (MLE).
Elsewhere In This Issue
Bob Shannon provides a comprehensive look at the LOADxx parmlib member, a critical and often overlooked member. In our S/390 News, you’ll find out about WLM goal mode successes and failures, a Y98 tape problem, and a summary of other recent WSC flashes.
5. Informational APARs of Interest
A past student alerted us to two informational APARs that we think you’ll find useful. APAR II10752 provides a wealth of information on Catalog problems and describes how to report to IBM any noticed CPU increases in the Catalog address space. I get a lot of questions about this CPU increase and would like to see more customers report the problem. This APAR also provides a list of performance APARs and other tips on reducing the CPU time in Catalog. APAR II10760 is a very important APAR for anyone considering OS/390 R4 WLM managed batch initiators. It is full of cautions and recommended APARs before you do the $ACTIVATE under JES2. In fact it lists some open APARs with a caution that you should wait until they are closed and applied before you do the $ACTIVATE (required before using WLM managed inits).
6. SHARE in Washington, DC in August
Tom and I will be attending SHARE in DC on August 16-21. I’ll be presenting on session (#2543) on Monday at 3pm called “Cheryl’s Hot Flashes”. You see, WSC has their WSC Flashes and several people give sessions on hot topics, and I wanted a session where I could talk about whatever was really on my customers’ minds. Someone in the EWCP project came up with this name (wish I could remember who!), and since I’m over 50 – it seemed pretty funny. I think you’ll find the session valuable. We won’t have a booth this time (remember, I’m trying to cut down a little), but you can easily find me hanging around most of the EWCP (Enterprise Wide Capacity and Performance) sessions. Please stop me and say hi.
That’s all for now. Stay tuned!