1. About Cheryl Watson’s Tuning Letter 2010 No. 4
2. Correction to Tuning Letter 2010 No. 4
3. Cheryl Watson’s CPU Charts Update
4. New Red Alert
5. New BoxScore Release
1. About Cheryl Watson’s Tuning Letter 2010 No. 4
The sixty-two page 2010 No. 4 Tuning Letter was emailed to paid subscribers on October 1st. You may visit our Web site at www.watsonwalker.com to obtain subscription information. The following is Tom’s Management Summary page from that issue, talking about some of the contents of this latest Tuning Letter:
zEnterprise
The majority of this issue describes IBM’s latest hardware announcement, the zEnterprise. As a manager, I’m sure that you’ve had plenty of marketing information from IBM about zEnterprise, the new z196 processors, zBX, and the zEnterprise Unified Resource Manager. But we’ve found that many customers are finding it difficult to understand some of the new terminology, and others are simply overloaded with too much information. In this issue, we emphasize the important issues related to performance, capacity planning, chargeback, hardware costs, and software costs.
There are two important cost issues that everyone should know about. First, the z196 is faster and cheaper than the z10 or z9. Most installations can save money by making their next upgrade a z196. This is especially true of the specialty processors where you can buy zLinux processors (IFLs) for the lowest cost yet. At $55,000 each, they are half the cost per MIPS of the z10 IFL. The second cost concerns the IBM software costs, which can be quite a bit lower than on the z10, as long as you use sub-capacity pricing. But if you don’t, a move to a z196 can increase your software costs. Be careful.
We also show why the zEnterprise BladeCenter Extension (zBX) can improve performance over any of your other blade servers by reducing the data path, the connections and switches, and the costs, all while simplifying the management of the servers (i.e. reducing staff). If you’ve ever considered consolidating your Unix or Linux servers, then you need to investigate zEnterprise. If you’re looking at zBX for business analytics, such as using the IBM Analytics Optimizer, we indicate some of the questions you need to ask before you jump into this solution.
We’d like to add one note of caution. Although most IBM marketing advertises up to 40% improvement in speed, the key words are “up to.” The actual range is 34% to 41%, but the 40% doesn’t start until the 57-way machines. As always, we strongly urge you to use a three-step approach when upgrading hardware or software, or when making LPAR configuration changes. See our z196 Processors article for more information on these steps.
- For hardware changes, use our CPU Charts to identify possible candidates with sufficient capacity, the optimum number of CPs, and the best MIPS per MSU. For software or subsystem changes, use IBM’s no-charge SoftCap tool to estimate changes in speed and capacity.
- Using the hardware candidates from our CPU Charts, run IBM’s no-charge estimation tool, zPCR, to estimate performance and capacity on those machines.
- After every change (software, hardware, configuration, tuning, etc.), run our software product, BoxScore, to verify the resulting performance and capacity.
Elsewhere In This Issue You’ll find many other useful items throughout this newsletter: User experiences on CICS and an MSO setting of zero, DFSMSdss, and DB2 Lock Structure Duplexing • SHARE Notes, including important APARs from IBM • Very valuable Information APARs and many New Function APARs.
Mainframe Hall of Fame Adds Cheryl
Bob Thomas, the man behind MainframeZone.com, z/Journal, Mainframe Executive (and previous publications such as MVS Journal), also writes Bob’s Big Iron Blog. If you don’t subscribe, you really should. Bob created a Mainframe Hall of Fame (http://www.mainframezone.com/static/mainframe-hall-of-fame/), which includes such luminaries as Gene Amdahl, Grace Hopper, Barry Merrill, and Thomas J. Watson, Jr. Bob recently added four more members, including Cheryl. Cheryl has always enjoyed sharing her knowledge (she’s a teacher at heart), and we’re very proud that Bob selected her to join this impressive group of people who have been “instrumental in the unprecedented success of the IBM mainframe.” We hope that you agree with Bob’s assessment. I know how hard she works for all of our readers.
[Note from Cheryl – I would never have achieved what I have without my husband, Tom (Walker). We are really a team, and he’s as much a part of our success as I am. The newsletter wouldn’t have happened or be nearly as useful without his involvement.]
If you don’t subscribe to the MainFrame Zone publications, be sure to check them out at www.mainframezone.com.
Speaking of important publications, we are not increasing the price of the Tuning Letter for 2011, so those of you who are planning budgets can be sure to include us again at the same price.
2. Correction to Tuning Letter 2010 No. 4
Our thanks go to Markus Kälin of SIX Group for finding the following typo: We included a link to a neat summary document from the Washington Systems Center (WSC) on page 55 of our Tuning Letter 2010 No. 4. The reference said PRS2561, but it should have been PRS2562. It will be corrected in the DVD. Here is the correct link:
PRS2562 – DS6000 and DS8000 Data Replication. (Updated 28Jul2010)
3. Cheryl Watson’s CPU Charts Update
On September 23rd, we emailed a correction and replacement for the August 2010 edition of Cheryl Watson’s CPU Charts that were originally emailed on September 14, 2010. It also replaces the July 2010 edition that was originally published on July 29, 2010.
The August 2010 Charts were updated to include analysis of the z/OS 1.11 LSPRs and the z196 models. Additionally, two new workloads were added – Low-Avg RNI and Avg-High RNI, because the zPCR tool that became available in August uses these workloads. The SU/Sec column was accidentally overlaid, so was reinserted. We also adjusted the values of the Low-Avg RNI and Avg-High RNI MIPS. We had been using the midpoint of the RNIs, while IBM used the harmonic mean. You will find significant differences in the larger n-ways, so please use these latest values.
In addition, we added the z/OS 1.11 Single-Image CPU Chart because zPCR supports single-image analysis. We still recommend using the Multi-Image Chart because it applies to the majority of the installations.
There is still one small typo in the CPU Chart document, but we will not be sending out a replacement. It will be corrected on the DVD. Thanks go to our long-time friend, Fabio Massimo Ottaviani of EPV Technologies, for catching this. In Figure 1 on page 6, we included IBM’s “workload hint” based on the RNI and level 1 cache miss percent (L1MP). The line for L1MP of 3% to 6% shows that you should use the Low RNI workload if your RNI is >0.6, but it should be corrected to read <0.6.
4. New Red Alert
IBM issued a new Red Alert on October 6, 2010 (http://www14.software.ibm.com/webapp/set2/sas/f/redAlerts/20101006.html)
2010.10.06 – Potential data corruption for IMS or DB2 for z/OS following rebuild of lock structure in data sharing mode. During rebuild of a lock structure in a DB2 V8 or DB2 V9 data sharing envionment, two problems may occur when locks are being rebuilt asynchronously into the new structure:
- The IRLM may incorrectly conclude that the rebuild is complete before all locks have been rebuilt into the new lock structure. This can cause new lock requests to be granted prematurely, resulting in incompatible locks being held across the data sharing group.
- The IRLM may ABEND before all locks have been rebuilt. In this case, locks that were not rebuilt in time will be lost and will not be reacquired on restart.
In both cases potential data loss or data corruption may result either during or following the rebuild event.
Since the problem is in IRLM, all versions of IMS may also be affected.
No recent DB2, IMS or IRLM maintenance has affected the possibility of encountering this issue.
The resolution to the above issues will be provided by IRLM APAR PM23662.
APAR PM23662 (OPEN, 7Oct2010) – ABENDS026 ABENDS47B Terminates Lock Structure Rebuild and Potentially Causes Loss of Locks. The hyperlink for this wasn’t yet available on a public site.
5. Our New BoxScore Release
As most of you know, we have been enthusiastic supporters of IBM’s no-charge zPCR tool. zPCR can be used to estimate the speed and capacity change due to a change in hardware or hardware configuration. We’ve also been supporters of IBM’s no-charge SoftCap tool, which predicts the changes due to software releases. But after you have made the changes, what tells you whether those estimates were correct? That’s where BoxScore comes in. It can be thought of as an after-the-fact benchmark to show how job steps or transactions were affected by the change. We take the results to show you the percent of change as well as the resulting MIPS. For more information on how BoxScore works and to get a no-obligation trial, see http://www.watsonwalker.com/boxscore.html.
Both new and existing customers should be aware of the additional support that we provide, as Cheryl will do conference calls to review your reports and help you to fully understand the results. You’re not on your own!
On September 27th, we emailed the latest release of BoxScore Version 2.2 to all BoxScore customers. All current BoxScore users are encouraged to install this release at their earliest convenience, especially if you are running z/OS 1.10 or later. If you will be migrating to a z196 machine, this release is required.
BoxScore V2R2 Enhancements:
- Added BoxScore CPU table support for IBM’s July 2010 LSPR announcement (zEnterprise 196 processors), to include new TABLE=111M, TABLE=111S, and also WORKLOAD= parameter values AVG-RNI, LOW-RNI, LOWAVG-RNI, AVGHIGH-RNI, and HIGH-RNI.
- Added BoxScore exit 07 – support for adding PROC-Step identification to existing Job-Step data-value for improved matched-set identification/correlation.
- Added BMC MainView for IMS support: MXG PDB CIMSTRAN and ITRM PDB XIMFTRN.
- Added STRTIME identification for MXG IMSTRAN / IMS0708.
- Added QWACPCNT (thread execution count) for DB2 parallel Thread (MXG).
- Added QPACSWIT for DB2 Package Switch (MXG).
- Improved DB2 ABEND indicator (QWACRINV=20) with INDATA (MXG).
- Updated MXG sample IMACKEEP variable list, now as of MXG V28.04.
- Increased CPU data-value display size in DETAILS report.
- Changed MICS CICS default to INDATA=CICCSU01 (CA distributes CICCAU turned off by default).
Stay Tuned!